\doxysection{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def Struct Reference}
\hypertarget{struct_____u_a_r_t___handle_type_def}{}\label{struct_____u_a_r_t___handle_type_def}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}


UART handle Structure definition.  




{\ttfamily \#include $<$stm32h7xx\+\_\+hal\+\_\+uart.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\+\_\+\+Type\+Def}} \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_aadd8a626e4d5dd937ee1b6461365831a}{Instance}}
\item 
\mbox{\hyperlink{struct_u_a_r_t___init_type_def}{UART\+\_\+\+Init\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a56ed519d3ec77350c528fb8536bd9f5a}{Init}}
\item 
\mbox{\hyperlink{struct_u_a_r_t___adv_feature_init_type_def}{UART\+\_\+\+Adv\+Feature\+Init\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a88c54ae212a356b0cfef3192374ebb09}{Advanced\+Init}}
\item 
const uint8\+\_\+t \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_ac997bb43410d347931f519a745a6e75f}{p\+Tx\+Buff\+Ptr}}
\item 
uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a1ba050351021762bf0414f9af78080c7}{Tx\+Xfer\+Size}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a640bb2017f3d6c58937c9cc8f0c866c2}{Tx\+Xfer\+Count}}
\item 
uint8\+\_\+t \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a3b693f9fad7d2feed3103b296e8960a8}{p\+Rx\+Buff\+Ptr}}
\item 
uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_adcd45d8ba72e0883dc85a6f217437809}{Rx\+Xfer\+Size}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a04c4b8902fadb460835b8856123453e1}{Rx\+Xfer\+Count}}
\item 
uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a4378cb66c15ac382d50a6886d7e04241}{Mask}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_ac706511c621510152fdb2c3582f3d23f}{Fifo\+Mode}}
\item 
uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_ad0d51cdd516e2b29f07b0424bad02919}{Nb\+Rx\+Data\+To\+Process}}
\item 
uint16\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_adf84f3a674dfa8ea3246c81100413036}{Nb\+Tx\+Data\+To\+Process}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_ga9f272475ea543a68fd8cb19f03a9bce9}{HAL\+\_\+\+UART\+\_\+\+Rx\+Type\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_ad43c273339bc3aaee1e848e20390d01c}{Reception\+Type}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_gadddf3d5480235c945dc8eec58f961203}{HAL\+\_\+\+UART\+\_\+\+Rx\+Event\+Type\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a00d86b409cac22035cef8c118bb22adf}{Rx\+Event\+Type}}
\item 
void(\texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a7eb9527674b4a4315c0ad317bc2f4cd4}{Rx\+ISR}} )(struct \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def}{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}huart)
\item 
void(\texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a2ae0e5e556f6a1eb46aabf8d010b5722}{Tx\+ISR}} )(struct \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def}{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}huart)
\item 
\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_afdedbb0ffa1d4bc145a01434d4794c92}{hdmatx}}
\item 
\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_aad7929af8d6acf108c85fe9c7b83c128}{hdmarx}}
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_ab367482e943333a1299294eadaad284b}{HAL\+\_\+\+Lock\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a203cf57913d43137feeb4fe24fe38af2}{Lock}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a0c4242c009d8754417dfd87a5ab6cb10}{g\+State}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def}} \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a1b5639a73b305432afeb6aa18506d0fb}{Rx\+State}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def_a0447bf9458caff1ad44ee7e947b1413f}{Error\+Code}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
UART handle Structure definition. 

\label{doc-variable-members}
\Hypertarget{struct_____u_a_r_t___handle_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_____u_a_r_t___handle_type_def_a88c54ae212a356b0cfef3192374ebb09}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!AdvancedInit@{AdvancedInit}}
\index{AdvancedInit@{AdvancedInit}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{AdvancedInit}{AdvancedInit}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a88c54ae212a356b0cfef3192374ebb09} 
\mbox{\hyperlink{struct_u_a_r_t___adv_feature_init_type_def}{UART\+\_\+\+Adv\+Feature\+Init\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Advanced\+Init}

UART Advanced Features initialization parameters \Hypertarget{struct_____u_a_r_t___handle_type_def_a0447bf9458caff1ad44ee7e947b1413f}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!ErrorCode@{ErrorCode}}
\index{ErrorCode@{ErrorCode}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{ErrorCode}{ErrorCode}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a0447bf9458caff1ad44ee7e947b1413f} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Error\+Code}

UART Error code \Hypertarget{struct_____u_a_r_t___handle_type_def_ac706511c621510152fdb2c3582f3d23f}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!FifoMode@{FifoMode}}
\index{FifoMode@{FifoMode}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{FifoMode}{FifoMode}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_ac706511c621510152fdb2c3582f3d23f} 
uint32\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Fifo\+Mode}

Specifies if the FIFO mode is being used. This parameter can be a value of \doxylink{group___u_a_r_t_ex___f_i_f_o__mode}{UARTEx FIFO mode}. \Hypertarget{struct_____u_a_r_t___handle_type_def_a0c4242c009d8754417dfd87a5ab6cb10}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!gState@{gState}}
\index{gState@{gState}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{gState}{gState}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a0c4242c009d8754417dfd87a5ab6cb10} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::g\+State}

UART state information related to global Handle management and also related to Tx operations. This parameter can be a value of \doxylink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def} \Hypertarget{struct_____u_a_r_t___handle_type_def_aad7929af8d6acf108c85fe9c7b83c128}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!hdmarx@{hdmarx}}
\index{hdmarx@{hdmarx}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{hdmarx}{hdmarx}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_aad7929af8d6acf108c85fe9c7b83c128} 
\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}}\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::hdmarx}

UART Rx DMA Handle parameters \Hypertarget{struct_____u_a_r_t___handle_type_def_afdedbb0ffa1d4bc145a01434d4794c92}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!hdmatx@{hdmatx}}
\index{hdmatx@{hdmatx}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{hdmatx}{hdmatx}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_afdedbb0ffa1d4bc145a01434d4794c92} 
\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}}\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::hdmatx}

UART Tx DMA Handle parameters \Hypertarget{struct_____u_a_r_t___handle_type_def_a56ed519d3ec77350c528fb8536bd9f5a}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!Init@{Init}}
\index{Init@{Init}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Init}{Init}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a56ed519d3ec77350c528fb8536bd9f5a} 
\mbox{\hyperlink{struct_u_a_r_t___init_type_def}{UART\+\_\+\+Init\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Init}

UART communication parameters \Hypertarget{struct_____u_a_r_t___handle_type_def_aadd8a626e4d5dd937ee1b6461365831a}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!Instance@{Instance}}
\index{Instance@{Instance}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Instance}{Instance}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_aadd8a626e4d5dd937ee1b6461365831a} 
\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\+\_\+\+Type\+Def}}\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Instance}

UART registers base address \Hypertarget{struct_____u_a_r_t___handle_type_def_a203cf57913d43137feeb4fe24fe38af2}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!Lock@{Lock}}
\index{Lock@{Lock}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Lock}{Lock}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a203cf57913d43137feeb4fe24fe38af2} 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_ab367482e943333a1299294eadaad284b}{HAL\+\_\+\+Lock\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Lock}

Locking object \Hypertarget{struct_____u_a_r_t___handle_type_def_a4378cb66c15ac382d50a6886d7e04241}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!Mask@{Mask}}
\index{Mask@{Mask}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Mask}{Mask}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a4378cb66c15ac382d50a6886d7e04241} 
uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Mask}

UART Rx RDR register mask \Hypertarget{struct_____u_a_r_t___handle_type_def_ad0d51cdd516e2b29f07b0424bad02919}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!NbRxDataToProcess@{NbRxDataToProcess}}
\index{NbRxDataToProcess@{NbRxDataToProcess}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{NbRxDataToProcess}{NbRxDataToProcess}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_ad0d51cdd516e2b29f07b0424bad02919} 
uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Nb\+Rx\+Data\+To\+Process}

Number of data to process during RX ISR execution \Hypertarget{struct_____u_a_r_t___handle_type_def_adf84f3a674dfa8ea3246c81100413036}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!NbTxDataToProcess@{NbTxDataToProcess}}
\index{NbTxDataToProcess@{NbTxDataToProcess}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{NbTxDataToProcess}{NbTxDataToProcess}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_adf84f3a674dfa8ea3246c81100413036} 
uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Nb\+Tx\+Data\+To\+Process}

Number of data to process during TX ISR execution \Hypertarget{struct_____u_a_r_t___handle_type_def_a3b693f9fad7d2feed3103b296e8960a8}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!pRxBuffPtr@{pRxBuffPtr}}
\index{pRxBuffPtr@{pRxBuffPtr}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{pRxBuffPtr}{pRxBuffPtr}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a3b693f9fad7d2feed3103b296e8960a8} 
uint8\+\_\+t\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::p\+Rx\+Buff\+Ptr}

Pointer to UART Rx transfer Buffer \Hypertarget{struct_____u_a_r_t___handle_type_def_ac997bb43410d347931f519a745a6e75f}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!pTxBuffPtr@{pTxBuffPtr}}
\index{pTxBuffPtr@{pTxBuffPtr}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{pTxBuffPtr}{pTxBuffPtr}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_ac997bb43410d347931f519a745a6e75f} 
const uint8\+\_\+t\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::p\+Tx\+Buff\+Ptr}

Pointer to UART Tx transfer Buffer \Hypertarget{struct_____u_a_r_t___handle_type_def_ad43c273339bc3aaee1e848e20390d01c}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!ReceptionType@{ReceptionType}}
\index{ReceptionType@{ReceptionType}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{ReceptionType}{ReceptionType}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_ad43c273339bc3aaee1e848e20390d01c} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_ga9f272475ea543a68fd8cb19f03a9bce9}{HAL\+\_\+\+UART\+\_\+\+Rx\+Type\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Reception\+Type}

Type of ongoing reception \Hypertarget{struct_____u_a_r_t___handle_type_def_a00d86b409cac22035cef8c118bb22adf}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!RxEventType@{RxEventType}}
\index{RxEventType@{RxEventType}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{RxEventType}{RxEventType}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a00d86b409cac22035cef8c118bb22adf} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_gadddf3d5480235c945dc8eec58f961203}{HAL\+\_\+\+UART\+\_\+\+Rx\+Event\+Type\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Rx\+Event\+Type}

Type of Rx Event \Hypertarget{struct_____u_a_r_t___handle_type_def_a7eb9527674b4a4315c0ad317bc2f4cd4}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!RxISR@{RxISR}}
\index{RxISR@{RxISR}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{RxISR}{RxISR}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a7eb9527674b4a4315c0ad317bc2f4cd4} 
void(\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Rx\+ISR) (struct \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def}{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}huart)}

Function pointer on Rx IRQ handler \Hypertarget{struct_____u_a_r_t___handle_type_def_a1b5639a73b305432afeb6aa18506d0fb}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!RxState@{RxState}}
\index{RxState@{RxState}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{RxState}{RxState}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a1b5639a73b305432afeb6aa18506d0fb} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def}} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Rx\+State}

UART state information related to Rx operations. This parameter can be a value of \doxylink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def} \Hypertarget{struct_____u_a_r_t___handle_type_def_a04c4b8902fadb460835b8856123453e1}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!RxXferCount@{RxXferCount}}
\index{RxXferCount@{RxXferCount}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{RxXferCount}{RxXferCount}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a04c4b8902fadb460835b8856123453e1} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Rx\+Xfer\+Count}

UART Rx Transfer Counter \Hypertarget{struct_____u_a_r_t___handle_type_def_adcd45d8ba72e0883dc85a6f217437809}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!RxXferSize@{RxXferSize}}
\index{RxXferSize@{RxXferSize}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{RxXferSize}{RxXferSize}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_adcd45d8ba72e0883dc85a6f217437809} 
uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Rx\+Xfer\+Size}

UART Rx Transfer size \Hypertarget{struct_____u_a_r_t___handle_type_def_a2ae0e5e556f6a1eb46aabf8d010b5722}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!TxISR@{TxISR}}
\index{TxISR@{TxISR}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{TxISR}{TxISR}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a2ae0e5e556f6a1eb46aabf8d010b5722} 
void(\texorpdfstring{$\ast$}{*} \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Tx\+ISR) (struct \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def}{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}huart)}

Function pointer on Tx IRQ handler \Hypertarget{struct_____u_a_r_t___handle_type_def_a640bb2017f3d6c58937c9cc8f0c866c2}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!TxXferCount@{TxXferCount}}
\index{TxXferCount@{TxXferCount}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{TxXferCount}{TxXferCount}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a640bb2017f3d6c58937c9cc8f0c866c2} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Tx\+Xfer\+Count}

UART Tx Transfer Counter \Hypertarget{struct_____u_a_r_t___handle_type_def_a1ba050351021762bf0414f9af78080c7}\index{\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}!TxXferSize@{TxXferSize}}
\index{TxXferSize@{TxXferSize}!\_\_UART\_HandleTypeDef@{\_\_UART\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{TxXferSize}{TxXferSize}}
{\footnotesize\ttfamily \label{struct_____u_a_r_t___handle_type_def_a1ba050351021762bf0414f9af78080c7} 
uint16\+\_\+t \+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def\+::\+Tx\+Xfer\+Size}

UART Tx Transfer size 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/\mbox{\hyperlink{stm32h7xx__hal__uart_8h}{stm32h7xx\+\_\+hal\+\_\+uart.\+h}}\end{DoxyCompactItemize}
